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The electrification of the powertrain is still one of the main challenges and innovation drivers for modern cars. With the introduction of the Toyota Prius, launched in Japan in 1997 the first commercially available hybrid car in mass production, the development continued towards the BMW i3 launched in July 2013. One main component for all kind of hybrid cars is still the power semiconductor, which is used for DC/DC converters and for the inverter to drive the electric motor for the traction control. What makes the selection of the right power semiconductor complex, is the variety of different voltage levels within the car (from standard 12V board net, the new 48V board net all the way up to 400V and above) plus different requirements in terms of switching and conduction performance, or accordingly power losses. The selection of device by application and voltage will be discussed in this paper.

Autonomous driving systems and connected mobility are the next big developments for the car manufacturers and their suppliers during the next decade. To achieve the high computing power needs and fulfill new upcoming requirements due to functional safety and security, heterogeneous processor architectures with a mixture of different core architectures and hardware accelerators are necessary. To tackle this new type of hardware complexity and nevertheless stay within monetary constraints, high performance computers, inspired by state of the art data center hardware, could be adapted in order to fulfill automotive quality requirements. The European Processor Initiative (EPI) research project tries to come along with that challenge for next generation semiconductors. To be as close as possible to series development needs for the next upcoming car generations, we present a hybrid semiconductor system-on-chip architecture for automotive.

The automotive industry experiences a major change as vehicles are gradually becoming a part of the Internet. Security concepts based on the closed-world assumption cannot be deployed anymore due to a constantly changing adversary model. Automotive Ethernet as future in-vehicle network and a new E/E Architecture have different security requirements than Ethernet known from traditional IT and legacy systems. In order to achieve a high level of security, a new multi-layer approach in the vehicle which responds to special automotive requirements has to be introduced. One essential layer of this holistic security concept is to restrict non-authorized access by the deployment of embedded firewalls. This paper addresses the introduction of automotive firewalls into the next-generation domain architecture with a focus on partitioning of its features in hardware and software.

Introduction The introduction of Ethernet and Gigabit Ethernet [2] as the main invehicle network infrastructure is the technical foundation for different new functionalities such as piloted driving, minimizing the CO2- footprint and others. The high data rate of such systems influences also the used microcontrollers due the fact that a big amount of data has to be transferred, encrypted, etc. Figure 1 Motivation - Vehicles will become connected to uncontrolled networks The usage of Ethernet as the in-vehicle-network enables the possibility that future road vehicles are going to be connected with other vehicles and information systems to improve system functionality. These previously closed automotive systems will be opened up for external access (see Figure 1). This can be Car2X connectivity or connection to personal devices. Allowing vehicle systems to communicate with other systems that are not within their physical boundaries impose a previously non-existing security problem.

The powertrain module is being introduced to embedded System on Chips (SoCs) designed to increase available computational power. These high-performance SoCs have the potential to enhance the computational power along with providing on-board resources to support unexpected feature growth and on-demand customer requirements. This project will investigate the radial basis function (RBF) using the Gaussian process (GP) regression algorithm, the ETAS ASCMO tool, and the hardware accelerator Advanced Modeling Unit (AMU) being introduced by Infineon AURIX 2nd Generation. ETAS ASCMO is one of the solutions for data-driven modeling and model-based calibration. It enables users to accurately model, analyze, and optimize the behavior of complex systems with few measurements and advanced algorithms. Both steady state and transient system behaviors can be captured.

The paper will give an introduction to the principle of the giant magneto resistive - GMR - effect and the silicon system integration of GMR sensors. The two main applications of a GMR as a magnetic field strength sensor and as an angular field direction sensor will be discussed under consideration of automotive requirements. The typical applications of a magnetic field strength GMR sensor in incremental position and speed sensing and those of GMR angular field sensors in position sensing will be summarized. Finally advantages of GMR in those applications will be discussed and conclusions on the use of GMR in automotive sensing will be drawn.

The standard ISO 26262 stipulates a “top-down” approach based on the process “V” model, by conducting a hazard analysis and risk assessment to determine the safety goals, and subsequently derives the safety requirements down to the appropriate element level. The specification of safety goals is targeted towards identified hazardous events, whereas the classification of safety requirements does not always turn out non-ambiguous. While requirement formalization turns out to be advantageous, the translation from natural language to semi-formal requirements, especially in context of ISO 26262, poses a problem. In this publication, a new approach for the formalization of safety requirements is introduced, targeting the demands of safety standard ISO 26262. Its part 8, clause 6 (“Specification and management of safety requirements”) has no dedicated work product to accomplish this challenging task.

Vehicle manufacturers are challenged by rising costs for vehicle recalls. A major part of the costs are caused by software updates. This paper describes a feasibility study on how to implement software update over the air (SOTA) in light vehicles. The differences and special challenges in the automotive environment in comparison to the cellular industry will be explained. Three key requirements focus on the drivers’ acceptance and thus are crucial for the vehicle manufacturers: SOTA must be protected against malicious attacks. SOTA shall interfere as little as possible with the availability of a vehicle. Long update processes with long vehicle downtimes or even complete fails must be avoided. The functional safety of the vehicle during operation may not be limited in any way The study gives options how those objectives can be achieved. It considers the necessary security measures and describes the required adaptations of the board-net architectures both on software and hardware level.

Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.

Multi-core systems are adopted quickly in the automotive domain, Proof of concepts have been implemented for power train, body and chassis, involving hard real-time constraints. However, depending on the degree of integration, it can be costly, especially in those cases where existing single-core software has to be migrated over. Furthermore, there seems to be a high level of uncertainty, whether a found solution, with regards to partitioning, mapping and orchestration of software is close to an optimum solution. Some integrated solutions demonstrate considerably less performance, for instance due to communication overhead compared to execution on single-core systems. This paper discusses a methodology, as to how to effectively and efficiently investigate the software architecture design space for multi-core software development.

In terms of modern technical systems, the automotive sector is characterized by escalating complexity and functionality requirements. The development of embedded control systems has to meet highest demands regarding process-, time- and cost-optimization. Hence, the efficiency of software development becomes a crucial competitive advantage. Systems design engineers need effective tools and methods to achieve exemplary speed and productivity within the development phase. To obtain such tools and methods, semiconductor manufacturers and tool manufacturers must work closely together. Within the joint efforts of ETAS and Infineon, the software tool suite ASCET-SD was enhanced to generate efficient C code for Infineon's TriCore architecture mapped on ETAS's real-time operating system ERCOSEK. The processor interface to application & calibration tools was realized using the ETK probe based on a JTAG/Nexus link at very high bandwidth.

The recent improvements in automotive electronics have had a tremendous impact on safety, comfort and emissions. But the continuous increase of the volume of electronic equipment in cars (representing more than 25% of purchasing volume) as well as the increasing system complexity represent a new challenge to quality, post-sales customer support and maintenance. Identifying a fault in a complex network of ECUs, where the different functions are getting more and more intricate, is not an easy task. It can be shown that with the levels of reliability common in 1980, an upper-range automobile of today could never function fault-free. On-Board-Diagnostics (OBD) concepts are emerging to assist the maintenance personnel in localizing the source of a problem with high accuracy, reducing the vehicle repair time, repair costs and costs of warranty claims.

This paper will address the electronic development in the wireless industry and compare it to the electronic development in the automotive industry. The wireless industry is characterized by rapid, dramatic high tech changes with a less than two-year cycle time and an equivalent life cycle. The automotive electronics industry is working toward reducing the typical 2 to 3 year development cycle down 1 to 2 years but with a life cycle of 10 years or more. In addition to realizing the electronic development benefits seen in the wireless industry, the automotive industry places significantly more emphasis on the quality and reliability aspects of their designs as many of them are targeted toward, or interface with, safety critical applications. One of the lessons learned from the wireless industry is the development process; where the hardware selection process can be accomplished in a virtual environment in conjunction with concurrent software development.

Today the majority of power electronics is developed based on the requirements set by the main fields of application e.g. power generation, power supply, industrial drive and traction. With introduction to automotive applications new requirements have to be taken into account. This paper discusses how interconnection technologies for power semiconductors can be improved to meet the demand for higher temperature capability in HEV applications.

This paper shall present advancements in electronic transmission control circuits addressing new challenges in the gearbox striving for improved vehicle efficiency and comfort of driving. Efficient chipset design, requires finding the optimal partitioning, that is the mapping of functionality to hardware or software and analog or digital circuit technology. The efficiency will be judged by minimal cost whilst achieving improved functionality and required scalability for a platform approach. Specific examples demonstrated are smart sensor architecture and new mapping of control strategies, realized with a novice integrated current control IC concept. Comparisons on system level are used to evaluate different function mappings as well as component partitioning. Details of the most optimized mapping and partitioning will be elaborated and first results of implementation in silicon components will be shown.

As the demand for enhanced comfort, safety and differentiation with new features continues to grow and as electronics and software enable most of these, the number of electronic units or components within automobiles will continue to increase. This will increase the overall system complexity, specifically with respect to the number of controller actuators such as e-motors. However, hard constraints on cost and on physical boundaries such as maximum power dissipation per unit and pin-count per unit/connector require new solutions to alternative system partitioning. Vehicle manufacturers, as well as system and semiconductor suppliers are striving for increased scalability and modularity to allow for most cost optimal high volume configurations while featuring platform reuse and feature differentiation. This paper presents new semiconductor based approaches with respect to technologies, technology mapping and assembly technologies.

It has become an important trend to implement safety-related requirements in the road vehicles. Recent studies have shown that accidents, which occurred when drivers are not focused due to fatigue or distractions, can be predicted in advance when using safety features. Advanced Driver Assistance Systems (ADAS) are used to prevent this kind of situation. Currently, many major tiers are using a DSP chip for ADAS applications. This paper suggests the migration from a DSP configuration to a Microcontroller configuration for ADAS application, for example, using a 32bit Multi-core Microcontroller. In this paper, the following topics will be discussed. Firstly, this paper proposes and describes the system block diagram for ADAS configuration followed by the requirements of the ADAS system. Secondly, the paper discusses the current solutions using a DSP. Thirdly, the paper presents a system that is migrated to a Multi-core microcontroller.

The trend towards even more sophisticated driver assistance systems and growing automation of driving sets new requirements for the robustness and availability of the involved automotive systems. In case of an error, today it is still sufficient that safety related systems just fail safe or silent to prevent safety related influence of the driving stability resulting in a functional deactivation. But the reliance on passive mechanical fallbacks in which the human driver taking over control, being inevitable in such a scenario, is expected to get more and more insufficient along with a rising degree of driving automation as the driver will be given longer reaction time. The advantage of highly or even fully automated driving is that the driver can focus on other tasks than controlling the car and monitoring it’s behavior and environment.

The increasingly stringent requirements in relation to emission reduction and onboard diagnostics are pushing the Chinese automotive industry toward more innovative solutions and a rapid increase in electronic control performance. To manage the system complexity the architecture will require being well structure on hardware and software level. The paper introduces GEMS-K1 (Gasoline Engine Management System - Kit 1). GEMS-K1 is a platform being compliant with Euro IV emission regulation for gasoline engines. The application software is developed using modeling language, the code is automatically generated from the model. The driver software has a well defined structure including microcontroller abstraction layer and ECU abstraction layer. The hardware is following design rules to be robust, 100% testable and easy to manufacture. The electronic components use the latest innovation in terms of architecture and technologies.

The C166 family, based on a 16-bit core; it is nowadays an enormous success in automotive, in particular in PowerTrain. This component is the right answer for the automotive real time applications of today. It is with both, automotive customer requirements and a long automotive experience in semi-conductors that this new generation 32-bit family is borne. The objective of this document is to provide and comment on automotive requirements in terms of the new micro-controller, to show the benefits for the applications and explain how the AUDO architecture fulfils these requirements.